Iouliia Skliarova

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In this paper an adaptive distribution system for manufacturing applications is considered and examined. The system receives a set of various components at a source point and supplies these components to destination points. The objective is to minimize the total distance that has to be traveled. At each destination point some control algorithms have to be(More)
—By adapting to computations that are not so well-supported by general-purpose processors, reconfigurable systems achieve significant increases in performance. Such computational systems use high-capacity programmable logic devices and are based on processing units customized to the requirements of a particular application. A great deal of the research(More)
This paper presents a technique for the design of digital systems on the basis of reusable hardware templates (HT), which are circuits with modifiable functionality that might be customized to satisfy requirements of target applications, such as a highly optimized implementation of the selected problem-specific operations. It demonstrates how HTs can be(More)
—This paper presents an approach that has been used for teaching disciplines on reconfigurable computing and advanced digital systems, which are intended to cover such topics as architectures and capabilities of field-programmable logic devices; languages for the specification, modeling, and synthesis of digital systems; design methods; computer-aided(More)
The paper analyses different techniques that might be employed in order to solve various problems of combinatorial optimization and argues that the best results can be achieved by the use of software running on a general-purpose computer together with an FPGA-based reconfigurable co-processor. It suggests an architecture for a combinatorial co-processor(More)
The paper analyses and compares alternative iterative and recursive implementations of FPGA circuits for various problems. Two types of recursive calls have been examined, namely for cyclic and binary (N-ary) search algorithms. The details of experiments are presented for four different design problems. The relevant comparative data have been obtained as a(More)
—The paper describes the hardware implementation and optimization of sorting algorithms that use data items as memory addresses with one-bit flags indicating presence of data. The proposed technique enables such type of address-based sorting to be applied either directly or through tree-walk tables permitting number of bits in sorted data items to be(More)
Reconfigurable systems are widely used nowadays to increase performance of computationally intensive applications. There exist a lot of synthesis tools that automatically generate customized hardware circuits from specifications in both high-level and hardware description languages. However, such tools have a limited applicability because they are unable to(More)
The paper analyses different techniques that might be employed in order to solve various problems of combinatorial optimization and argues that the best results can be achieved by the use of software, running on a general-purpose computer, together with an FPGA-based reconfigurable co-processor. It suggests architecture of combinatorial co-processor, which(More)