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Advanced CMOS technologies are highly susceptible to process, voltage, and temperature (PVT) variations due to sub-wavelength lithography and other manufacturing challenges. These variations cause performance uncertainty for which timing margins must be added to guarantee correct operation. Ultimately, this results in lost performance or energy: performance(More)
This paper presents Razor-Lite, which is a low-overhead register for use in error detection and correction (EDAC) systems. These systems are able to eliminate timing margins by using specialized registers to detect setup time violations. However, these EDAC registers incur significant area and energy overheads, which mitigates some the system benefits.(More)
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