• Citations Per Year
Learn More
A low-energy single-ended duobinary transceiver is proposed for the point-to-point DRAM interface with an energy efficiency of 0.56 pJ/bit at 7 Gb/s. The transmitter power is reduced by decreasing the signal swing of transmission channel to 80 mV and replacing the multiplexer and the binary output driver in the transmitter by a duobinary output driver. A(More)
A switched-diode termination (SDT) is proposed to implement a low-power transceiver circuit for on-chip singleended signaling through a through-silicon via (TSV). The channel signal swing is limited to 40 mV by the SDT to reduce the transmitter (TX) power. An inverter-cascade amplifier is used to reduce the receiver (RX) power. The SDT consists of an nMOS(More)
  • 1