Igor Melatti

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In this paper we show that statistical properties of the transition graph of a system to be verified can be exploited to improve memory or time performances of verification algorithms. We show experimentally that protocols exhibit transition locality. That is, with respect to levels of a breadth-first state space exploration, state transitions tend to be(More)
Model checking of safety properties can be scaled up by pooling the CPU and memory resources of multiple computers. As compute clusters containing 100s of nodes, with each node realized using multi-core (e.g., 2) CPUs will be widespread, a model checker based on the parallel (shared memory) and distributed (message passing) paradigms will more efficiently(More)
Many <i>embedded systems</i> are indeed <i>software-based control systems</i>, that is, control systems whose controller consists of <i>control software</i> running on a microcontroller device. This motivates investigation on <i>formal model-based design</i> approaches for automatic synthesis of embedded systems control software. We present an algorithm,(More)
The Technical Reports of the Dipartimento di Informatica at the University of L'Aquila are available online on the portal http://www.di.univaq.it. Authors are reachable via email and all the addresses can be found on the same site. Increasingly, the eXtensible Markup Language (XML) is adopted as a de facto standard format for documents on Internet and is(More)
Fuzzy control is well known as a powerful technique for designing and realizing control systems. However, statistical evidence for their correct behavior may be not enough, even when it is based on a large number of samplings. In order to provide a more systematic verification process, the cell-to-cell mapping technology has been used in a number of cases(More)
System Level Analysis calls for a language comprehensible to experts with different background and yet precise enough to support meaningful analyses. SysML is emerging as an effective balance between such conflicting goals. In this paper we outline some the results obtained as for SysML based system level functional formal verification by an ESA/ESTEC(More)
We show how by combining Explicit Model Checking techniques and simulation it is possible to effectively carry out (bounded) System Level Formal Verification of large Hybrid Systems such as those defined using model-based tools like Simulink. We use an explicit model checker (namely, CMurphi) to generate all possible (finite horizon) simulation scenarios(More)