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In the near future, Multi-Processor Systems-on-Chip (MPSoC) will become the main thrust driving the evolution of integrated circuits. MPSoCs introduce new challenges, mainly due to growing communication through their interconnect structure. Current electrical interconnects will face hard challenges to overcome such data flows. Integrated optical(More)
Levels of marine debris, including microplastics, are largely un-documented in the Northeast Atlantic Ocean. Broad scale monitoring efforts are required to understand the distribution, abundance and ecological implications of microplastic pollution. A method of continuous sampling was developed to be conducted in conjunction with a wide range of vessel(More)
RATIONALE Stable isotope values (δ(13)C and δ(15)N) of darted skin and blubber biopsies can shed light on habitat use and diet of cetaceans, which are otherwise difficult to study. Non-dietary factors affect isotopic variability, chiefly the depletion of (13)C due to the presence of (12)C-rich lipids. The efficacy of post hoc lipid-correction models(More)
Throughput, power consumption, signal integrity, pin count and routing complexity are all increasingly important interconnect issues that the system designer must deal with. Recent advances in integrated optical devices may deliver alternative interconnect solutions enabling drastically enhanced performance. This paper begins by outlining some of the more(More)
State-of-the-art System-on-Chip (SoC) consists of hundreds of processing elements, while trends in design of the next generation of SoC point to integration of thousand of processing elements, requiring high performance interconnect for high throughput communications. Optical on-chip interconnects are currently considered as one of the most promising(More)
In this paper, we present a tool to analyse photonic devices that can be used to realize basic building blocks of an optical network-on-chip (ONoC). Co-design between electrical tools and optical tools is possible. The VHDL-AMS language has been used to implement behavioral models of photonic devices. For low-level simulation, a gateway between an optical(More)
This article presents IDEA1, a SystemC-based system-level design and simulation framework for WSNs. It allows the performance evaluation (e.g., packet delivery rate, transmission latency and energy consumption) at high level, but with elaborate models of the hardware and software of sensor nodes. Many hardware components are modeled and the IEEE 802.15.4(More)
— The many cores design research community have shown high interest in optical crossbars on chip for more than a decade. Key properties of optical crossbars, namely a) contention free data routing b) low latency communication and c) potential for high bandwidth through the use of WDM, motivate several implementations of this type of interconnect. These(More)