I-Yao Chuang

Learn More
The increasing complexity of today's system-on-a-chip (SoC) design is challenging the design engineers to evaluate the system performance and explore the design space. Electronic system-level (ESL) design methodology is of great help for attacking the challenges in recent years. In this paper, we present a system-level architecture refinement flow and(More)
The trend towards heterogeneous multi-core integration and higher communication bandwidth drastically increases the complexity of the SoC. Architecture design and system validation become extremely challenging. This paper presents a system-level virtual platform and simulation environment for multi-core system performance profiling and evaluation. At the(More)
Multi-core system and the associated software parallelization techniques have become one of the major trends of SoC design. A multi-core system with high hardware efficiency and software parallelism has the potential of achieving higher system performance and lower power consumption. This paper reveals how system performance prediction and analysis for(More)
  • 1