Learn More
The ability to obtain accurate predictions of bus arrival time on a real time basis is vital to both bus operations control and passenger information systems. Several studies have been devoted to this arrival time prediction problem in many countries; however, few resulted in completely satisfactory algorithms. This paper presents an effective method that(More)
In this paper, a high, flat gain and low noise factor for a 3-11 GHz single ended ultra-wideband low noise amplifier (LNA) applications. The proposed LNA uses current reuse technique for low power consumption, high and flat gain. To achieve wideband input matching, the shunt-shunt resistive feedback and degenerative parallel LC technique are used. The(More)
This paper presents a highly efficient AES algorithm resistant to differential power analysis (DPA). This paper conducts a simulation based correlation power analysis (CPA) attack on AES implementation with different structures. The proposed idea does not affect the working frequency and does not alter the algorithm core architecture. A minimal overhead(More)
In this paper one chip hybrid automatic testing system is designed, implemented and tested. A low power low voltage (LP/LV) FPGA 400K XCV 400 pg560 chip was used in the implementation and design procedure. The testing methodology is based on pseudo random testing strategy. To save memory locations, digital testing signature is extracted using an MISR(More)
  • 1