Learn More
While NAND flash memory is used in a variety of end-user devices, it has a few disadvantages, such as asymmetric speed of read and write operations, inability to in-place updates, among others. To overcome these problems, various flash-aware strategies have been suggested in terms of buffer cache, file system, FTL, and others. Also, the recent development(More)
Most mobile devices are equipped with a NAND flash memory even if it has characteristics of not-in-place update and asymmetric I/O latencies among read, write, and erase operations: write/erase operations are much slower than a read operation in a flash memory. For the overall performance of a flash memory system, the buffer replacement policy should(More)
By using small-sized, next-generation NVRAM (such as MRAM, FeRAM and PRAM) as a write buffer, we can improve the overall performance of the NAND flash memory-based storage systems. However, traditional address mapping algorithms in Flash Translation Layer (FTL) software were designed without any consideration of the existence of write buffer. In this paper,(More)
Recent development of next generation non-volatile memory types such as MRAM, FeRAM and PRAM provide higher commercial value to Non-Volatile RAM (NVRAM). In this paper, we suggest the utilization of small-sized, next-generation NVRAM as a write buffer to improve the overall performance of NAND flash memory-based storage systems. We propose a novel(More)
We enhance the recently proposed output feedback stabilization scheme by the authors. One of the major contributions of the previous work is the presentation of a constructive way to relax the uniform observability condition, which has been frequently used in order to establish a nonlinear semi-global separation principle, by assuming the existence of a(More)
  • 1