Hyeon-Mi Yang

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In this paper, FPGA low power technology mapping for reuse module design under the time constraint is proposed. Traditional high-level synthesis does not allow reuse of complex, realistic datapath component during the task of scheduling. On the other hand, the proposed algorithm is able to approach a productivity of the design the low power to reuse which(More)
This paper proposes an efficient two stage demosaicing method to interpolate color filter array images. The proposed method based on the edge sensing technique improves the interpolation performance by adopting the color difference model for a green channel as well as a red/blue channel. In particular, the green channel interpolation method with a new(More)
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