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An 80 Gbit/s 1:2 demultiplexer (DEMUX) is presented that was fabricated using 0.1-/spl mu/m-gate-length InP-based HEMT technology. A data input buffer with a common-gate amplifier in front is employed to achieve a low return loss over wide frequency range and to suppress signal distortion, which is mainly caused by multiple reflections between a DEMUX chip(More)
We developed a novel design technique for a D-type flip-flop (D- FF) circuit that is based on a small-signal-equivalent circuit approach. This technique provides the best condition to operate the D-FF at a high frequency. Using this technique, we fabricated a master-slave D-FF using a 0.15-/spl mu/m InP HEMT technology. We achieved 40-Gbit/s operation with(More)
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