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In this paper a new scheme for deterministic and mixed mode scan-based BIST is presented. It relies on a new type of test pattern generator which resembles a pro-grammable Johnson counter and is called folding counter. Both the theoretical background and practical algorithms are presented to characterize a set of deter-ministic test cubes by a reasonably(More)
In this paper a novel architecture for scan-based mixed mode BIST is presented. To reduce the storage requirements for the deterministic patterns it relies on a two-dimensional compression scheme, which combines the advantages of known vertical and horizontal compression techniques. To reduce both the number of patterns to be stored and the number of bits(More)
This paper proposes a new BIST test pattern generation scheme based on random access scan architecture. In this scheme, segment-fixing strategy is used to BIST test pattern generator based on a counter, which can reduce the number of redundant test patterns, and improve the efficiency of test patterns generation. As random access scan mechanism is utilized(More)
A novel collaborative scheme of test data compression based on fixed-plus-variable-length (FPVL) coding is presented, with which the test data can be compressed efficiently. In this scheme, code words are divided into fixed-length head and variable-length tail. In order to obtain further compression, the highest bit of the tail is reduced from the code(More)