Hongye Jia

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In this paper a 32-bit multithreaded RISC microprocessor is designed and optimized to perform data moving and processing in the high-performance Network Processor which is flexible to a wide variety of networking, communications, and other data-intensive products. As a critical part of network processor, the microprocessor mainly takes in charge of Internet(More)
This paper presents a new architecture of shared QDR SRAM controller in the parallel processing of network processor to make the SRAM controller suitable for higher bandwidth and higher speed network communication. With line rate close to dozens of gigabit per second (Gbps), various bottlenecks related with speed, bandwidth and interface must be addressed.(More)
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