Hisaya Imai

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This work presents a lateral RF BJT built on SOI-CMOS compatible substrate. The primary motivation is to realize a SOI-BiCMOS technology suitable for low power RF and mixed-signal SoC. This novel LBJT structure relies on a self-aligned polysilicon side-wall-spacer (PSWS) to connect the base contact to the intrinsic base with dimensions in 100 nm range. The(More)
Vertical double diffused MOSFET (VDMOS) is an established technology for high-current power-switching applications such as automotive circuits. The most serious failure mode is destructive damage during inductive switching, resulting from avalanche breakdown of the forward-blocking junction in the presence of high current flow. Improving the ruggedness of(More)
Amplitude of 1/f noise in NMOS and PMOS FETs has a strong dependency on bias conditions. Gate and drain bias dependencies of the noise were investigated in a wide operation range that covers both linear and saturation regions. The results are discussed referring to Hooge's empirical relationships commonly observed for the 1/f noise in semiconductor(More)
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