Hisakazu Edamatsu

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A high speed multiplier and divider for MOS LSI based on a new algorithm is presented. When we implement the multiplier and the divider in LSI, the features such as high speed operation, small number of transistors and easy layout are the most important factors. A computational algorithm using a redundant binary representation has several excellent features(More)
1. The orientation sound (pulse) of the mustached bat, Pteronotus parnellii parnellii, consists of four harmonics (H1-4), each containing a long constant-frequency component (CF1-4) followed by a short frequency-modulated component (FM1-4). The auditory cortex of this species contains several "combination-sensitive" areas: FM-FM, dorsal fringe (DF), ventral(More)
1. The orientation sound (pulse) of the mustached bat, Pteronotus parnellii parnellii, consists of long constant-frequency components (CF1-4) and short frequency-modulated components (FM1-4). The auditory cortex of this bat contains several combination-sensitive areas: FM-FM, DF, VA, VF, and CF/CF. The FM-FM area consists of neurons tuned to a combination(More)
This paper describes the delay calculation method and the accuracy analysis of its interpolation for CMOS ASIC libraries which contain cell-based primitives and memories to be used during the pre-layout design phase of logic simulation, timing verification, and logic synthesis. The delay calculation method addressed in this paper is specified as IEC CDV(More)
This paper describes the methocblogies used to design a Hi-Vision MUSE decoder for Japanese HDTV and codec LS/s for digital VCRs. Since a large anount of input video thta is needed to verify the algorithms and logic designs, reducing the verificotion time is a key issue in designing these LS/s. We describe the methocblogy used to verify the video signal(More)
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