Hiroshi Kodama

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A 30MHz–2.4GHz CMOS receiver with a highly linear integrated tunable RF filter, as well as with a dynamic-range-scalable RSSI-based energy detector for both whitespace and interference-level sensing, is reported. The test chip, fabricated in 90-nm CMOS process, achieves over 42dB harmonic rejection including seventh-order harmonic without any(More)
To relax the trade-off relationship between tuning range and phase noise, we have developed a new interpolative ring-VCO having a wide control voltage range over which frequency variation is linear. A wide lock-range, low phase noise PLL incorporating this VCO has been fabricated in a 90 nm CMOS process. It successfully operates at from 3.432 to 4.488 GHz(More)
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