Hiroshi Fuketa

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Contention-less flip-flops (CLFF's) and separated power supply voltages (V<inf>DD</inf>) between flip-flops (FF's) and combinational logics are proposed to achieve a maximum energy efficiency(More)
This paper presents a robust and compact SRAM physically-unclonable-function (PUF) cell using a polycrystalline-Si channel (poly-Si) FinFET, for the first time. Its process is identical to that of a(More)
Scaling power supply voltages (V<sub>DD</sub>'s) of logic circuits down to the sub/near-threshold region is a promising approach to achieve significant power reductions. Circuit delays in the(More)