Hiroomi Hikawa

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This paper describes a new pulse-mode digital neuron which is based on voting neuron. The signal level of the neuron is represented by frequency of pulse signals. The proposed neuron provides adjustable nonlinear function, which resembles the sigmoid function. The proposed neuron and experimental multilayer neural network (MNN) are implemented on field(More)
This paper proposes a new type of digital pulse-mode neuron that employs piecewise-linear function as its activation function. The neuron is implemented on field programmable gate array (FPGA) and tested by experiments. As well as theoretical analysis, the experimental results show that the piecewise-linear function of the proposed neuron is programmable(More)
The self-organizing map (SOM) has found applicability in a wide range of application areas. Recently new SOM hardware with phase modulated pulse signal and digital phase-locked loops (DPLLs) has been proposed (Hikawa, 2005). The system uses the DPLL as a computing element since the operation of the DPLL is very similar to that of SOM's computation. The(More)
Many self-organizing maps (SOMs) implemented on hardware restrict their neighborhood function values to negative powers of two. In this paper, we propose a novel hardware friendly neighborhood function that is aimed to improve the vector quantization performance of hardware SOM. The quantization performance of the hardware SOM with the proposed neighborhood(More)
This paper discusses the use of self-organizing map (SOM) for a color quantization that reduces the number of colors used in a color image, and a SOM-based hardware color quantization system is proposed. The RGB components in the image are fed to the SOM as the input vector. Then they are quantized into a smaller number of vectors that are used to form a(More)
This paper discusses a hand posture recognition system with a hybrid network classifier. The hybrid network consists of SOM and Hebbian network. Feature vector is extracted from the input hand posture image and the given feature vector is mapped to a lower-dimensional map by the SOM. Then the supervised Hebbian network performs category acquisition and(More)
This paper proposes a new vector quantization algorithm that can be directly implemented by hardware and its performance is discussed. The algorithm is based on the assumption that most of the vector elements in the same class fall within a certain range. The proposed algorithm provides very fast vector quantization with a dedicated hardware. VHDL(More)