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This paper presents a general method for computing quantitative information about finite-state real-time systems. We have developed algorithms that compute exact bounds on the delay between two speci$ed events and on the number of occurrences of an event in a given interval. This technique allows us to determine performance measures such as schedulability… (More)

- Edmund M. Clarke, Orna Grumberg, +4 authors Linda A. Ness
- Formal Methods in System Design
- 1993

- E. Clarke, O. Grumberg, +4 authors L. Ness
- 1992

We used a hardware description language to construct a formal model of the cache coherence protocol described in the draft IEEE Futurebus+ standard. By applying temporal logic model checking techniques, we found several errors in the standard. The result of our project is a concise, comprehensible and unambiguous model of the protocol that should be useful… (More)

- Kiyoharu Hamaguchi, Hiromi Hiraishi, Shuzo Yajima
- Theor. Comput. Sci.
- 1992

- Hiromi Hiraishi
- Systems and Computers in Japan
- 2000

- Shigeharu Teshima, Hiromi Hiraishi, Shuzo Yajima
- Systems and Computers in Japan
- 1988