Hervé Petit

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OBJECTIVE To compare the efficacy and tolerance of botulinum A toxin (BTx) versus lidocaine (L), applied in the external urethral sphincter with a single transperineal injection in order to treat detrusor sphincter dyssynergia (DSD) in spinal cord injured patients. METHODS Thirteen patients (1F, 12 M) suffering from chronic urinary retention due to DSD(More)
Noise-immunity of a logic gate or a circuit is now an important design criterion with dimension scaling to nanometers. Two noise-immune design structures based on Markov random field (MRF) have been proposed in [1], [2] and [3]. These design structures can achieve an excellent noise-immunity but with a large number of redundant transistors. In this paper, a(More)
The design for reliability concept is already in use on digital circuits, but not systematically in use on AMS or RF circuits. A reliable circuit design demands knowledge of the physical degradation and models to analyze the reliability in earlier stages. Also, it needs to be simple enough to be used on the redesign. In this work, we propose and validate an(More)
Radio frequency (RF) products are very demanding in terms of technology developments. Reliability will be one of the most important challenges for the semiconductor industry during the following years. This work presents a wideband low noise amplifier (WBLNA) designed in CMOS 65 nm, its model for reliability estimation, and simulated results of fresh and(More)
A low power and low cost WLAN/WiMAX RF front-end requires more advanced CMOS technologies whose transistor parameters degradation is becoming worse. Few published works has presented the reliability results for RF circuits. In order to fill this gap, we develop a new synthesis methodology for reliable RF front-end design using the design example of a(More)
Reliability becomes a critical challenge in analogue integrated circuits (ICs) design in deep sub-micron region. In order to manufacture ICs with high quality, methodology and analysis must include reliability consideration in design loop. In this paper, we propose a new statistical reliability-aware approach to evaluate circuit performance under ageing(More)
Circuit ageing degradation is becoming worse in advanced node technologies, where low power and low cost RF front-end should be implemented. Thus, reliability is one of the most important challenges. In this work, we analyze a WLAN/WiMAX RF front-end architecture reliability with a behavioral description language (VerilogA) using a top-down approach. We(More)
In order to reduce power consumption and limit the amount of data acquired and stored for astrophysical signals, an emerging sampling paradigm called compressed sensing (also known as compressive sensing, compressive sampling, CS) could potentially be an efficient solution. The design of radio receiver architecture based on CS requires knowledge of the(More)
In this paper we present a merged Digitally Controlled Oscillator DCO and Time To Digital Converter TDC architecture. The DCO is a nine-stage interpolative ring made by NOR cells. It is designed for TV applications and it is implemented in 65nm CMOS process. The oscillator has a large frequency range, from 50MHz to 500MHz, and a 28 ×(More)