Hemendra Singh Negi

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Multitasked real-time systems often employ caches to boost performance. However the unpredictable dynamic behavior of caches makes schedulability analysis of such systems difficult. In particular, the effect of caches needs to be considered for estimating the inter-task interference. As the memory blocks of different tasks can map to the same cache blocks,(More)
Memory subsystem, in particular, cache design is important for both high performance and embedded computing systems. The trend towards increased customization for embedded systems, in addition, requires the design of an optimal cache configuration for each application. Trace driven simulation is widely used to evaluate cache performance. However, traces are(More)
Determining worst case execution time of a program by static analysis is important for the design of real-time software. WCET analysis at the programming language level requires the detection of the longest path in the program. A tighter bound on the WCET of a program can be achieved by identifying the infeasible paths in the program’s control flow, which(More)
Statically estimating the worst case execution time of a program is important for real-time embedded software. This is difficult even in the programming language level due to the inherent difficulty in detecting infeasible paths in a program’s control flow graph. In this paper, we study the problem of accurately bounding the execution time of a program(More)
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