Hemanta Kumar Mondal

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Networks-on-Chip (NoC) have emerged as communication backbones for enabling high degree of integration in future many-core chips. Despite their advantages, the communication is multi-hop and causes high latency and power dissipation, especially in larger systems. Wireless Network-on-Chip (WNoC) significantly improves the latency over traditional wired NoCs(More)
Networks-on-Chip (NoCs) have garnered significant interest as communication backbone for multicore processors used across a wide range of fields that demand higher computation capability. Wireless NoCs (WNoCs) by augmenting single hop, long range wireless links with wired interconnects; offer the most promising solution to reduce multi-hop long distance(More)
Summary form only given, as follows. The complete presentation was not made available for publication as part of the conference proceedings. Current commercial System-on-Chip (SoC) designs integrate an increasingly large number of predesigned cores, and their number is predicted to increase significantly in the near future. These stateof- the-art commercial(More)
Network-on-Chip (NoC) with wireless interconnects is one of the potential solutions to overcome limitations of conventional NoC architectures over far-apart communications in multicore systems. Detailed investigations of Wireless NoC (WNoC) highlight their many benefits. But, idle-state power consumption associated with WI interfaces and routers is(More)
Networks-on-Chip (NoCs) have been well accepted for energy efficient on-chip communications for multicore systems. But, a NoC router consumes considerable leakage power even when not in use. For large scale systems, number of unused routers at any time is reasonably high. A significant amount of this leakage power can be saved by applying fine-grained(More)
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