Heinrich Meyr

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This paper presents the machine description language LISA for the generation of bitand cycle accurate models of DSP processors. Based on a behavioral operation description, the architectural details and pipeline operations of modern DSP processors can be covered. Beyond the behavioral model, LISA descriptions include other architecture-related information(More)
In this paper, the problem of carrier synchronization of OFDM systems in the presence of a substantial frequency offset is considered. New frequency estimation algorithms for the data aided (DA) mode are presented. The resulting two stage structure is able to cope with frequency offsets in the order of mukbles of the spacing between subchannels. Key(More)
Abstruet-Digital realizations of timing recovery circuits for digital data transmission are of growing interest. In this paper, we present a new digital algorithm which can be implemented very efficiently also at high data rates. The resulting timing jitter has been computed and verified by simulations. In contrast to other known algorithms, the one(More)
Only for you today! Discover your favourite architecture exploration for embedded processors with lisa book right here by downloading and getting the soft file of the book. This is not your time to traditionally go to the book stores to buy a book. Here, varieties of book collections are available to download. One of them is this architecture exploration(More)
In the last decade, instruction-set simulators have become an essential development tool for the design of new programmable architectures. Consequently, the simulator performance is a key factor for the overall design efficiency. Based on the extremely poor performance of commonly used <i>interpretive</i> simulators, research work on fast <i>compiled</i>(More)
The achievable rate of a coherent coded modulation (CM) digital communication system with dataaided channel estimation and a discrete, equiprobable symbol alphabet is derived under the assumption that the system operates on a flat fading MIMO channel and uses an interleaver to combat the bursty nature of the channel. It is shown that linear minimum mean(More)
The development of application specific instruction set processors (ASIP) is currently the exclusive domain of the semiconductor houses and core vendors. This is due to the fact that building such an architecture is a difficult task that requires expertise knowledge in different domains: application software development tools, processor hardware(More)
Digital systems, especially those for mobile applications are sensitive to power consumption, chip size and costs. Therefore they are realized using fixed-point architectures, either dedicated HW or programmable DSPs. On the other hand, system design starts from a floating-point description. These requirements have been the motivation for FRIDGE(More)