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At early design space exploration phases of architectures for systems on a chip (SOC) total costs of silicon are of high interest. An accurate chip size estimation needs detailed knowledge of the transistor densities of a semiconductor process. This paper introduces a novel and simplified chip size estimator, which is independent of manufacturer specific(More)
| The architecture and implementation of a pro-grammable video signal processor dedicated as building block of a MIMD-based bus-connected multiprocessor system is presented. This system can either be constructed from several single processor chips, or it can be integrated on a large area integrated circuit containing several processors. The processor allows(More)
In this paper we present a simulation-based approach to determine the impact of placement and duty-cycle of wireless embedded sensor actor network (WESAN) nodes on various parameters, such as expectable lifetime, latency and overall operability. It accurately reflects hardware characteristics, e.g. power consumption, switching times, and therefore enables(More)