Hartwig Jeschke

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This paper discusses efficiency measures for the evaluation of high performance systems on a chip (SOC), considering a throughput rate R, chip size A, power dissipation P, and a flexibility criterion F. Based on the analysis of recently published multimedia chips, the paper shows equivalences between the ratio of R over AP, a weighted sum on 1/R, A, P, and(More)
At early design space exploration phases of architectures for systems on a chip (SOC) total costs of silicon are of high interest. An accurate chip size estimation needs detailed knowledge of the transistor densities of a semiconductor process. This paper introduces a novel and simplified chip size estimator, which is independent of manufacturer specific(More)
This paper discusses efficiency measures for the evaluation of high performance multimedia systems on a chip (SOC), considering a throughput rate R, chip size A, power dissipation P, and a flexibility criterion F. Based on the analysis of recently published multimedia chips, the paper shows equivalences between the ratio of R over AP, a weighted sum on 1/R,(More)
|The architecture and implementation of a programmable video signal processor dedicated as building block of a MIMD-based bus-connected multiprocessor system is presented. This system can either be constructed from several single processor chips, or it can be integrated on a large area integrated circuit containing several processors. The processor allows(More)
Therapy and rehabilitation of patients with craniocerebral trauma is particularly difficult to programme on account of the neuropsychological defects and personality changes found in this population. The Ulm rehabilitation hospital seeks to face up to this fact by intense interdisciplinary cooperation in the nursing and medical sector, the fields of(More)