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This research paper aims at analyzing the impact of exploiting the parallelism available in two common Elliptic Curve Cryptography (ECC) projective forms on speed and cost factors, assuming point-multiplication is implemented using the m-ary algorithm instead of the popular binary algorithm. Point-multiplication is implemented using scalable multipliers in(More)
In this research paper, we aim at proposing a new energy-aware approach in order to authenticate packet flows in systems with limited energy. Reduction of power consumption is obtained by dynamically merging data packets and using lower message digests as a function of the system energy. This approach allows increasing the lifetime of battery-operated(More)
This paper presents a FPGA implementation of a Sub-pixel correction algorithm for active laser range find-ers. It shows how to replace complex CPU operations by an efficient use of arithmetic functional units and lookup tables LUTs. This leads to a less complex architecture and an increase in performance. The architecture of a processor element, its(More)
In system-level design using hardware-software co-design approaches, applications involved in embedded systems are usually represented as data flow diagrams (DFD) where nodes may either be implemented in software or in hardware, subject to cost-performance constraints. In our research paper, we present how genetic algorithms can be used in order to perform(More)