Haigeng Wang

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Preex computation is a fundamental operation at the core of many important applications, e.g., some of the Grand Challenge problems, circuit design, digital signal processing, graph optimizations, and computational geometry. Given a 0 ; : : :; a N?1 , preex computation evaluates a 0 a 1 : : : a k , for 0 k < N, with associative operation. In this paper, we(More)
Given xl, . . . , XN, parallel prefix computes ~1 0 X2 0 . . . 0 xk, for 1 < k ~ N, with associative operation o. We show optimal schedules for parallel prefix computation with a fixed number of resources p > 2 for a prefix of size N ~ p(p + 1)/2 . The time of the opt imal schedules with p resources is [2N/(p + 1)1 for N ~ p(p + 1)/2, which we prove to be(More)
Many large-scale scienti c and engineering computations, e.g., some of the Grand Challenge problems [1], spend a major portion of execution time in their core loops computing band linear recurrences (BLR's). Conventional compiler parallelization techniques [4] cannot generate scalable parallel code for this type of computation because they respect(More)
An m-th order linear recurrence system of N equations computes x i = c i + P j=i m i 1 a ij x j for 1 i N . Linear recurrences have a role of central importance in computer design, numerical analysis, program analysis, digital signal processing and many non-numerical algorithms. However, programs containing band linear recurrences are di cult to signi(More)
We present a new technique for the high-level synthesis of scalable MCM-based architectures implementing infinite-impulse response(IIR) filters. Our technique is based on the regular schedules, a class of parallel schedules for computing mth-order IIR filters. The simplicity of the regular schedules facilitates characterization of their inter-processor(More)
In this paper, we present a new scalable algorithm, called the Regular Schedule, for parallel evaluation of band linear recurrences (BLR's, i.e., mth-order linear recurrences for m 1). Its scalability and simplicity make it well suited for vector supercomputers and massively parallel computers. We describe our implementation of the Regular Schedule on two(More)
Linear difference equations involving recurrences are fundamental equations that describe many import ant signal processing applications. For many high sample rate digital filter applications, we need to effectively parallelize the linear difference equations used to describe digital tilt ers – a difficult task due to the recurrences inherent in the data(More)
We describe the high-level synthesis of scalable 1 parallel architectures implementing in niteimpulse response (IIR) lters using multi-chip module (MCM). Our approach is based on a new class of parallel schedules for computing mth-order IIR lters, called regular schedules. The simplicity of the regular schedules facilitates characterization of their(More)