H. Oppermann

Publications69
h-index13
Citations499
Highly Influential Citations5
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TSV based silicon interposer technology for wafer level fabrication of 3D SiP modules
Silicon interposers with through silicon vias (TSVs) have become important key components of 3D architectures. They are used as intermediate carrier and wiring device for IC components like logics,… Expand
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Assembly and reliability of flip chip solder joints using miniaturized Au/Sn bumps
Flip chip assembly experiments using small electroplated Au/Sn bumps, i.e. bumps of 50 /spl mu/m in diameter and less, are carried out. After plating the bumps consist of a Au layer with a thinner Sn… Expand
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Solder-bonded micromachined capacitive pressure sensors
We report the first solder-bonding of low-cost silicon absolute pressure sensors. The goal of the work is to solder a pressure sensor wafer and a CMOS wafer containing the signal conditioning… Expand
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Untersuchungen zum quasibinären System Bi2Se3/BiI3
Aus den Ergebnissen von DTA-Untersuchungen, Gesamtdruckmessungen mit dem Membrannullmanometer und der Rontgenphasenanalyse wurde das Phasendiagramm des quasibinaren Systems Bi2Se3/BiCl3 aufgestellt.… Expand
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Biocompatible hybrid flip chip microsystem integration for next generation wireless neural interfaces
Chronically implantable, wireless neural interfaces require biocompatible, long term stable, and high density integration of all functional sub-components. For this, the integration and… Expand
  • 25
Polyimide based temporary wafer bonding technology for high temperature compliant TSV backside processing and thin device handling
Temporary wafer bonding for thin wafer processing is one of the key technologies of 3D system integration. In this context we introduce the polyimide material HD3007 which is suitable for temporary… Expand
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Evaluation of the packaging and encapsulation reliability in fully integrated, fully wireless 100 channel Utah Slant Electrode Array (USEA): Implications for long term functionality
We evaluate the encapsulation and packaging reliability in fully integrated, fully wireless 100 channel Utah Slant Electrode Array (USEA)/integrated neural interface-recording version 5 (INI-R5) by… Expand
  • 25
Advances in thermal interface technology: mono-metal interconnect formation, processing and characterisation
As the demand for new thermal technologies and materials has been increasing over the years to provide thermal solutions to the next generation of power electronics, microprocessors and high-power… Expand
  • 21
Hermetic wafer level packaging of MEMS components using through silicon via and wafer to wafer bonding technologies
This paper presents the fabrication steps of a MEMS package based on silicon interposer wafers with copper filled TSVs and bonded cap wafers for hermetic sealing of resonator components. All… Expand
  • 22
Influences of technological processing and surface finishes on thermal behaviour of thermal interface materials
The ongoing need for miniaturization and speed in electronics industry has brought a requirement for better performing thermal management systems. One of the major bottlenecks in thermal management… Expand
  • 14