H. Cragon

Publications48
h-index6
Citations203
Highly Influential Citations8
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Computer Architecture and Implementation
This book is orientated towards readers who already have an understanding of state machine logic design, assembly-language programming and basic operating systems. Each chapter contains a set of… Expand
  • 40
  • 4
Interrupt Processing in Concurrent Processors
TLDR
Systems architects are faced with many possibilities for designing interrupt processing strategies that optimize computer resources and performance. Expand
  • 31
  • 2
Branch strategy taxonomy and performance models
  • H. Cragon
  • Computer Science
  • IEEE computer society press monograph
  • 1 August 1991
TLDR
For software designers, classifies and describes six basic branching strategies, present analytic models to evaluate each strategy under various work-load and pipeline parameters, and outlines a modeling methodology for evaluating new branching strategies. Expand
  • 20
  • 1
  • PDF
Graph-theoretic techniques for computer intraconnection minimization
TLDR
The design and minimization of computer intraconnections have a great influence on system characteristics such as cost, performance, failure rate, and in the case of VLSI, chip area. Expand
  • 2
  • 1
Memory systems and pipelined processors
  • 38
The Elements of Single-Chip Microcomputer Architecture
  • H. Cragon
  • Computer Science
  • Computer
  • 1 October 1980
Unique—and sometimes obscure—characteristics distinguish single-chip microcomputers from conventional architectures. Current examples show that no one section can be optimized at the expense of… Expand
  • 20
  • PDF
The TI Advanced Scientific Computer
TLDR
The authors describe some of the design decisions that determined the architecture and implementation of the Advanced Scientific Computer (ASC). Expand
  • 13
An evaluation of code space requirements and performance of various architectures
  • H. Cragon
  • Computer Science
  • CARN
  • 15 February 1979
TLDR
The advocates of stack architecture advance the argument, among others, that code space is reduced due to the zero address characteristic of operation instructions. Expand
  • 6
Processor implementations using queues
TLDR
For several decades, designers have used queues to resolve two processor-memory interface problems - long latency and low bandwidth. Expand
  • 5
Locality characteristics of symbolic programs
TLDR
By analyzing the virtual address traces of artificial intelligence applications, characteristics have been found in the temporal, spatial, and structural locality of the virtual memory references during symbolic program execution. Expand
  • 4