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- Publications
- Influence
Anomalous C-V characteristics of implanted poly MOS structure in n/sup +//p/sup +/ dual-gate CMOS technology
- C. Lu, J. Sung, H. C. Kirsch, S.J. Hillenius, T. Smith, L. Manchanda
- Materials Science
- IEEE Electron Device Letters
- 1 May 1989
The C-V characteristics of arsenic-doped polysilicon show a gate-bias dependence of the inversion capacitance and a reduction in the expected value of the inversion capacitance. The characteristics… Expand
Polysilicon encapsulated local oxidation
- S. Roth, W. Ray, C. Mazure, H. C. Kirsch
- Materials Science
- IEEE Electron Device Letters
- 1 March 1991
Polysilicon encapsulated local oxidation (PELOX) is proposed as an effective isolation technique that satisfied advanced device requirements without any difficult-to-control structures or processes.… Expand
A high-performance quadruple well, quadruple poly BiCMOS process for fast 16 Mb SRAMs
- J. Hayden, M. Woo, +12 authors H. C. Kirsch
- Materials Science
- International Technical Digest on Electron…
- 1992
An advanced, high-performance BiCMOS technology has been developed for fast 16Mb SRAMs. A split word-line bitcell architecture, using four levels of polysilicon and two self-aligned contacts,… Expand
Technology for the fabrication of A 1 MB CMOS DRAM
- D. S. Yaney, J.C. Desko, +6 authors H. C. Kirsch
- Materials Science
- International Electron Devices Meeting
- 1985
We describe the cell structure and fabrication methods employed for a practical 1 MB CMOS DRAM. This process combines concentrated efforts in the cell array with a core technology of 1.25 uM Twin-Tub… Expand
Recessed polysilicon encapsulated local oxidation
- K.J. Cooper, S. Roth, W. Ray, H. C. Kirsch, J. Ko
- Materials Science
- IEEE Electron Device Letters
- 1 October 1991
Local oxidation of silicon (LOCOS) is the most commonly used isolation technology in silicon integrated circuits. The inherently large field oxide encroachment associated with LOCOS severely limits… Expand
A high-performance low-complexity bipolar technology using selective collector compensation
- R. C. Taft, J. Hayden, D. Denning, H. C. Kirsch
- Engineering
- International Technical Digest on Electron…
- 1992
This paper describes a novel bipolar technology which achieves very high ECL performance while maintaining low process complexity, large fabrication tolerances, and full CMOS compatibility. The high… Expand