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This paper presents the design of a fast and low power consumption distance computation unit : i (Ai − Bi) 2. It is dedicated to the digital RBF neural network implementation. The proposed architecture is composed of two parts. The first computes the distance (Ai − Bi) 2 , and the second performs the sum of these distances. It is based on an efficient(More)
Elliptic Curve Cryptography (ECC) has gained increasing acceptance in the industry, the academic community and the cryptography applications. This interest is mainly due to the high level of security with relatively small keys provided by ECC. In this paper, a high-performance ASIC based ECC key generation processor is proposed. This processor supports(More)
1. Abstract In this paper parallel adders with minimum delay and minimum complexity under left-to-right sequential input arrival are investigated. The delay is the result time after the arrival of the last input digits which are the least significant ones. An analytical model of the complexity is established and a synthesis algorithm is described. The(More)
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