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This paper presents the design of a fast and low power consumption distance computation unit : ∑ i(Ai −Bi) . It is dedicated to the digital RBF neural network implementation. The proposed architecture is composed of two parts. The first computes the distance (Ai − Bi), and the second performs the sum of these distances. It is based on an efficient squarer(More)
A power efficient multirate multistage Comb decimation filter for monobit A/D converters is presented. Polyphase decomposition in all stages with high decimation factor in the first stage, are used to reduce the frequency of the input signal. Several implementations have shown that proper choice of the decimation factor of the first stage can reduce power(More)
Elliptic Curve Cryptography (ECC) has gained increasing acceptance in the industry, the academic community and the cryptography applications. This interest is mainly due to the high level of security with relatively small keys provided by ECC. In this paper, a high-performance ASIC based ECC key generation processor is proposed. This processor supports(More)
Cellular automata (CA) have been accepted as a good evolutionary computational model for the simulation of complex physical systems. They have been used for various applications, such as parallel processing computations and number theory. In this paper, we studied the applications of cellular automata for the modular multiplications; we proposed two new(More)
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