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Fast transient charging effects (FTCE) are found to be the source of various undesirable characteristics of high-k devices, such as V/sub th/ instability, low DC mobility and poor reliability. The intrinsic characteristics of high-k transistors free from FTCE are demonstrated using ultra-short pulsed I-V measurements, and it is found that the intrinsic(More)
We report a thermally stable N-metal process in which surface passivation of HfSiO dielectric using thin layers of La<sub>2</sub>O<sub>3</sub>, deposited by either MBE or PVD, significantly shifts the metal gate effective work function toward the Si conduction band edge. Well-behaved transistors with L<sub>g</sub> down to 70 nm have been fabricated with(More)
This paper investigates the work function adjustment on fully silicided (FUSI) NiSi metal gates for dual-gate CMOS, and how it is effected by the poly-Si dopants. By comparing FUSI on As-, B-, and undoped poly-Si using the same p-Si substrates, it is shown that both As and B influence the work function of NiSi FUSI gate significantly, with As showing more(More)
Select amorphous metals (transition-metal-silicon-nitride: TaSiN, MoSiN, HfSiN, TiSiN), were systematically evaluated for their electrical (effective work function) and physical (XRD, HRTEM, HAADF-STEM, EELS) properties. Effective work function values spanning 4.16 to 4.8 eV were observed for these materials after a 1000/spl deg/C anneal and on both SiO/sub(More)
V<sub>fb</sub> roll-off phenomena in high work function (WF) metal gate on high-k is successfully explained by progressive oxygen vacancy (V<sub>o</sub> <sup>+</sup>) generation in high-k as bottom oxide scales. Based on this understanding, low temperature O incorporation (LTOI) process has been developed, which reduces PMOS V<sub>t</sub> significantly by(More)
We describe an NMOS band edge solution that uses a metal gate doped with Lanthanide elements to achieve work functions as low as 4.05eV. The capping interlayers used in previous works are no longer necessary, and metal gate implementation became much simpler. Using this electrode, low V<sub>th</sub> value and high mobility suitable for high performance(More)
This letter presents a novel technique for tuning the work function of a metal gate electrode. Laminated metal gate electrodes consisting of three ultrathin (/spl sim/1-nm) layers, with metal nitrides (HfN, TiN, or TaN) as the bottom and top layers and element metals (Hf, Ti, or Ta) as the middle layer, were sequentially deposited on SiO/sub 2/, followed by(More)
This paper presents a novel technique for tuning the work function of metal gate electrodes. Laminated metal gate electrodes consisting of 1/spl sim/3 ultra thin (/spl sim/10 /spl Aring/) layers of Ta, TaN, Ti, TiN, Hf or HfN and bulk metal nitride gate electrodes were deposited on SiO/sub 2/, HfO/sub 2/ or HfON, followed by RTP annealing to evaluate their(More)
Scaled CMOS transistors with several types of metal gates on hafnium based high-k dielectrics were processed and studied to understand the influence of metal gates on device characteristics. The different metal gates that were comparatively studied include (a) TiN processed by ALD and PVD, and (b) PVD processed TaSiN and a multilayer HfN/Ta/TiN stack. From(More)
An overview of factors that contribute to the effective work function of metal gate electrodes are presented and reasons for disparity in reported values for effective work function of similar metals from different groups are discussed. Utilizing a standardized technique to accurately extract the effective work function of metal gates, the potential of(More)