Gurjeet S. Saund

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A partial scan selection strategy is proposed in which flip-flops are selected via newly proposed dynamic reachability and observability measures such that the remaining hard-to-detect faults are easily detected. This is done by taking advantage of the information available when a target fault is aborted by the test generator. A partial scan selection tool,(More)
This paper addresses the problem of flip flop selection for partial scan in sequential circuits. In particular it addresses some of the shortcomings of the popular flip flop selection methods, based on cutting cycles present in the graph of the circuit structure. Previous approaches assume that cutting all cycles makes the circuit totally testable, which is(More)
STAFAN (Statistical Fault Analysis) is a well known testability analysis program which predicts the fault coverage of a digital circuit under the stuck-at fault model, without actually performing fault simulation. STAFAN offers speed advantage over other testability analysis programs such as SCOAP; further, it explicitly predicts the fault coverage for a(More)
Estimation of circuit testability is an important issue when evaluating the circuit design. A testability measure indicates how easy or difficult it would be to generate tests for the circuit. STAFAN (Statistical Fault Analysis) is a well known gate-level testability analysis program which predicts the fault coverage of a digital circuit under the stuck-at(More)
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