Grzegorz Lupina

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We experimentally demonstrate DC functionality of graphene-based hot electron transistors, which we call graphene base transistors (GBT). The fabrication scheme is potentially compatible with silicon technology and can be carried out at the wafer scale with standard silicon technology. The state of the GBTs can be switched by a potential applied to the(More)
Integration of graphene with Si microelectronics is very appealing by offering a potentially broad range of new functionalities. New materials to be integrated with the Si platform must conform to stringent purity standards. Here, we investigate graphene layers grown on copper foils by chemical vapor deposition and transferred to silicon wafers by wet(More)
Vertical graphene-based device concepts that rely on quantum mechanical tunneling are intensely being discussed in the literature for applications in electronics and optoelectronics. In this work, the carrier transport mechanisms in semiconductor-insulator-graphene (SIG) capacitors are investigated with respect to their suitability as electron emitters in(More)
We fabricate back-gated field effect transistors using niobium electrodes on mechanically exfoliated monolayer graphene and perform electrical characterization in the pressure range from atmospheric down to 10(-4) mbar. We study the effect of room temperature vacuum degassing and report asymmetric transfer characteristics with a resistance plateau in the(More)
We discuss the origin of an additional dip other than the charge neutrality point observed in the transfer characteristics of graphene-based field-effect transistors with a Si/SiO2 substrate used as the back-gate. The double dip is proved to arise from charge transfer between the graphene and the metal electrodes, while charge storage at the graphene/SiO2(More)
The successful integration of graphene into microelectronic devices is strongly dependent on the availability of direct deposition processes, which can provide uniform, large area and high quality graphene on nonmetallic substrates. As of today the dominant technology is based on Si and obtaining graphene with Si is treated as the most advantageous(More)
The practical difficulties to use graphene in microelectronics and optoelectronics is that the available methods to grow graphene are not easily integrated in the mainstream technologies. A growth method that could overcome at least some of these problems is chemical vapour deposition (CVD) of graphene directly on semiconducting (Si or Ge) substrates. Here(More)
Dislocation networks are one of the most principle sources deteriorating the performances of devices based on lattice-mismatched heteroepitaxial systems. We demonstrate here a technique enabling fully coherent germanium (Ge) islands selectively grown on nanotip-patterned Si(001) substrates. The silicon (Si)-tip-patterned substrate, fabricated by(More)
The epitaxial integration of highly heterogeneous material systems with silicon (Si) is a central topic in (opto-)electronics owing to device applications. InP could open new avenues for the realization of novel devices such as high-mobility transistors in next-generation CMOS or efficient lasers in Si photonics circuitry. However, the InP/Si heteroepitaxy(More)