Grzegorz Labiak

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The author in his research has focused on real time digital controllers which traditionally are designed as finite state machines or Petri nets. Such controllers can be effectively modelled with some subset of UML statecharts and next can directly be implemented in programmable logic devices (for example FPGA). This transformation is being realized by a(More)
In the paper useful methods of concurrent processes synchronization in UML state machine diagrams are presented. It is not easy to transform complex behaviour description into statecharts, even if the formal specification has already been given, for example as a hierarchical Petri net. Both graphical forms of specifications can be used simultaneously,(More)
One of the most important problems of verification of discrete event control systems is detection of possible incorrect communication between concurrent processes, such as mutual blocking. Processes can be modeled as state machines, and such detection can be performed by analysis of behavior of the communicating automata. For such analysis in general case(More)
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