Gregor Pobegen

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We study n-and pMOS devices with 3.2–30 nm thick SiON or SiO 2 gate dielectrics and n ++ or p ++ doped polysilicon gates to identify the type and energetic location of defects created through bias temperature stress. The results clearly indicate a dependence of the type of BTS induced defects on the stress polarity and the gate poly doping. If holes are(More)
Total Published = 180 Articles (4 co-authored with undergraduate students and 106 co-authored with graduate students)
Alongside the intensive debate concerning the influence of hydrogen on NBTI we present several details which have received little or no attention in the past. We show experimental evidence that hydrogen does not only passivate interface traps but also positive oxide charges or border traps. Besides passivation, hydrogen increases the overall drift(More)
Investigations on degradation mechanisms have great importance regarding device reliability. Deeper understanding of the NBTI is one of the crucial issues for MOSFET manufacturing. This also includes studying possible consequences of individual steps during fabrication on the device performance. The present work shows that a back end of line process like(More)
We study p-type metal-oxide-semiconductor field-effect transistors (pMOSFETs) using the direct-current-current-voltage (DCIV) method before and after bias temperature stress. The stress is varied over a wide range of temperatures using our polyheater technology. The ability of the SRH model and a multistate non-radiative multiphonon (NMP) model to(More)
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