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A detailed GPU cache model based on reuse distance theory
TLDR
This work extends reuse distance to GPUs by modelling the GPU's hierarchy of threads, warps, threadblocks, and sets of active threads, including conditional and non-uniform latencies, cache associativity, miss-status holding-registers, and warp divergence.
View on IEEE
High performance predictable histogramming on GPUs: exploring and evaluating algorithm trade-offs
TLDR
This paper presents two novel histogramming methods, both achieving a higher performance and predictability than existing methods and guarantees to be fully data independent.
View on ACM
Adaptive and transparent cache bypassing for GPUs
TLDR
This paper proposes a novel compile-time framework for adaptive and transparent cache bypassing on GPUs that uses a simple yet effective approach to control the bypass degree to match the size of applications' runtime footprints.
View on ACM
Fine-Grained Synchronizations and Dataflow Programming on GPUs
TLDR
This paper proposes a novel approach for fine-grained inter-thread synchronizations on the shared memory of modern GPUs, and demonstrates its performance, and applies it to Needleman-Wunsch - a 2D wavefront application involving massive cross-loop data dependencies.
View on ACM
Fast Hough Transform on GPUs: Exploration of Algorithm Trade-Offs
TLDR
The results show that optimizing the GPU code for speed can achieve a speed-up over naive GPU code of about 10×, and the implementation which achieves a constant processing time is quicker for about 20% of the images.
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GPU-Vote: A Framework for Accelerating Voting Algorithms on GPU
TLDR
This work describes a transformation to merge categories which enables gpu-vote to have a single implementation for all voting algorithms, and gives an accurate and intuitive performance prediction model for the generalized GPU voting algorithm.
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Simulation and architecture improvements of atomic operations on GPU scratchpad memory
TLDR
This paper proposes to use a hash function in both the addressing of the banks and the locks of the scratchpad memory in GPGPU-Sim to reduce serialization of threads and result in a speed-up in histogram and Hough transform applications with minimum hardware costs.
View on IEEE
Configurable XOR Hash Functions for Banked Scratchpad Memories in GPUs
TLDR
This paper explores the use of configurable bit-vector and bitwise XOR-based hash functions to evenly distribute memory addresses of the access patterns over the memory banks, reducing the number of bank conflicts.
View on IEEE
A Study of the Potential of Locality-Aware Thread Scheduling for GPUs
TLDR
It is concluded that non-optimised programs have the potential to achieve good cache and memory utilisation when using a smarter thread scheduler, and re-ordering threads automatically for better locality to improve the programmability of multi-threaded processors.
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Compile-time GPU memory access optimizations
TLDR
To describe these optimizations, a new notation of the parallel execution of GPU programs is introduced and an implementation of the optimizations shows that performance improvements of up to 40 times are possible.
View on IEEE
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