Gerhard Schrom

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We demonstrate an integrated buck dc–dc converter for multiCC microprocessors. At nominal conditions, the converter produces a 0.9-V output from a 1.2-V input. The circuit was implemented in a 90-nm CMOS technology. By operating at high switching frequency of 100 to 317 MHz with four-phase topology and fast hysteretic control, we reduced inductor and(More)
Rapidly increasing input current of microprocessors resulted in rising cost and motherboard real estate occupied by decoupling capacitors and power routing. We show by analysis that an on-die switching DC-DC converter is feasible for future microprocessor power delivery. The DC-DC converter can be fabricated in an existing CMOS process (90nm-180nm) with a(More)
Fluctuations in intrinsic linear V<inf>t</inf>, free of impact of parasitics, are measured for large arrays of NMOS and PMOS devices on a testchip in a 150nm logic technology. Local intrinsic &#963;V<inf>T</inf>, free of extrinsic process, length and width variations, is random, and worsens with reverse body bias. Although the traditional area-dependent(More)