Gerald Goertzel

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A method for logic gate delay assignment is described which achieves power minimization of digital logic while satisfying system timing. The logic gates are described by a single design parameter macromodel. A Newton optimization scheme is employed using exact sparse updating. Systems consisting of up to 1200 digital logic gates have been optimized. A(More)
LCD, a Language for Computer Design, permits the description of both the function and the structure of digital hardware. Machines may be described at a very high (system) level, at a very low (gate) level, or at any intermediate level. LCD descriptions are processed by a set of programs which support high level design and verification. These programs(More)
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