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AFDX (Avionics Full Duplex Switched Ethernet) is a network designed for safety-critical applications in avionics systems. The flow analysis is mandatory for the certification. The end-to-end (ETE) delay upper bound has to be computed and hence guaranteed. Different approaches have been proposed to compute ETE delay upper bound such as the Network Calculus(More)
The AFDX (Avionics Full DupleX Switched Ethernet) is the backbone network of most modern civilian aircraft. For certification reasons, a guaranteed upper bound has to be determined on the end-to-end delay for all transmitted flows. Several approaches have been designed in order to analyze such delays. In this paper, we focus on the Forward End-to-End delays(More)
Packet switched networks such as AFDX (Avionics Full Duplex Switched Ethernet) are a major upgrade for avionics systems communication. The computation of a guaranteed upper bound on End-to-end delay of all flows transmitted in the network is mandatory for certification reasons. Considering existing methods, we define a forward End-to-End delay analysis that(More)
In this paper we propose parametric approximation algorithm (Fully Polynomial Time Approximation Scheme - FPTAS) that defines a compromise on the precision of computed worst-case response time upper bounds and the amount of extra processor speed required to achieve exact worst-case response times. Such a result fills the remaining gap between our previously(More)
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