George S. Moschytz

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—A procedure for the design of allpole filters with low sensitivity to component tolerance is presented. The filters are based on resistance–capacitance (RC) ladder structures combined with single operational amplifiers. It is shown that by the use of impedance tapering, in which L-sections of the RC ladder are successively impedance-scaled upwards, from(More)
This tutorial paper proposes a subclass of cellular neural networks (CNN) having no inputs (i.e., autonomous) as a universal active substrate or medium for modeling and generating many pattern formation and nonlinear wave phenomena from numerous disciplines, including biology, chemistry, ecology, engineering, physics, etc. Each CNN is defined mathematically(More)
An all-analog high-speed decoding technique is described which is suitable for magnetic recording (MR) and other computationally demanding applications. A de-coder for a binary (18,9,5) tail-biting trellis code, which is much simpler than the codes used for MR, has been chosen to demonstrate this technique. It achieves a decoding rate of 100 Mbit/s at a(More)
This paper presents a new approach to the adaptation of a wavelet filterbank based on perceptual and rate-distortion criteria. The system makes use of a wavelet-packet transform where each subband can have an individual time-segmentation. Boundary effects can be avoided by using overlapping blocks of samples and therefore switching bases is possible at(More)
Iterative decoding of high-performance error-correcting codes, such as turbo and related codes, is computationally demanding. This paper presents the application of a new type of analog computing network that enables the construction of all-analog decoders for such codes which outperform digital decoders in terms of speed and/or power consumption. The(More)
The authors show how continuous-time active-RC filters can be implemented in CMOS by replacing all resistors by MOSFETs operating in the linear region. As an example, a 24MHz active-MOSFET-C single-amplifier biquadratic lowpass filter with a pole-Q of 3 implemented in a 0.6 µ m CMOS process is discussed. By comparing measurements of a test chip, simulations(More)
— This paper describes two related topics. First, it is shown how the concept of the MOSFET-C integrator can be extended to single-amplifier filter biquads. Then a new differential input balanced-output current conveyor (CCII) is presented , which has two essentially symmetrical and balanced signal paths. Using this CCII, a 4th-order lowpass filter cascade(More)
The signal processing algorithms based on conventional shift operator tend to be ill-conditioned in situations involving fast sampling and shorter wordlength. To alleviate this problem delta operator based analysis and design has been proposed for high speed digital signal processing and control systems. The advantage for delta (8) operator seems to come(More)