George Kornaros

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Billion transistor systems-on-chip increasingly require dynamic management of their hardware components and careful coordination of the tasks that they carry out. Diverse real-time monitoring functions assist towards this objective through the collection of important system metrics, such as throughput of processing elements, communication latency, or(More)
One of the main bottlenecks when designing a network system is very often its memory subsystem. This is mainly due to the extremely high speed of the state-of-the-art network links and to the fact that in order to support advanced Quality of Service (QoS), a large number of independent queues is desirable. In this paper we describe the architecture and(More)
Network-on-chip based multicore systems need efficient management of a multitude of processing resources, hence avoiding hardware and system software from making inefficient time- and power-decisions at runtime. Hardware event management is a necessary path to assist in high-speed management of captured events and enable efficient reaction mechanisms. This(More)
The increasing availability of different kinds of processing resources in heterogeneous system architectures associated with today’s fast-changing, unpredictable workloads has propelled an interest towards systems able to dynamically and autonomously adapt how computing resources are exploited to optimize a given goal. Self-adaptiveness and(More)
Multimedia applications executing on NoC-based multicore architectures demand high performance and power-efficiency. We propose a low-cost NoC DPM controller that performs dynamic frequency scaling on each NoC router by activating shared memory-based monitoring probes at different parallel application slices or using an independent sample rate. We evaluate(More)
This paper presents a reconfigurable architecture of a lab-on-chip (LoC) microarray device capable to process data either in genotyping or in gene expression applications in a fraction of the time that is required by the usual software methods running on a standard computer. The entire LoC consists of a microfluidics part for the sample preparation and(More)