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Nurse Rostering is a combinatorial problem hard to solve due to its size and complexity. Several real world details that arise in practice make computerized approaches to the problem indispensable. The specifications of the problem that we solve are those defined in the Nurse Rostering Competition INRC2010. In this contribution, we solve the Nurse Rostering(More)
SUMMARY The use of LAN-based clusters of computers for computational purposes has been in use for several years with significant success and acceptability. The introduction of the Internet infrastructure as the interconnection medium of the cluster allows for additional flexibility and transparency of such systems. PLEIADES is an Internet-based(More)
—The mapping process of high performance embedded applications to today's reconfigurable multiprocessor System-on-Chip devices suffers from a complex toolchain and programming process. Thus, the efficient programming of such architectures in terms of achievable performance and power consumption is limited to experts only. Enabling them to non-experts(More)
SUMMARY In this paper, SchedSP, a middleware framework for providing scheduling solutions as services over the Internet, is presented. Emphasis is given on creating a reusable framework that facilitates the development of specialized clients for the input, output and control interfaces of the various scheduling applications. SchedSP manages the task of(More)
In this paper, an Application Service Providing framework for the provision of real world scheduling applications as services, named SchedSP, is presented. The main assumption of this paper is that the main business tendency is for distant users to have relatively small computational capabilities with web access being the main remaining capability. Since(More)
Today's reconfigurable multicore architectures become more and more complex. They consist of several processing units, not necessarily identical, different interconnecting modules, memories and possibly other components. Programming such kind of architectures requires deep knowledge of the underlying hardware and is thus very time consuming and error prone.(More)
The mapping process of high performance embedded applications to today's multiprocessor system on chip devices suffers from a complex tool chain and programming process. The problem here is the expression of parallelism with a pure imperative programming language which is commonly C. This traditional approach limits the mapping, partitioning and the(More)