George Economakos

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This paper is a continuation of a previous work by the same authors concerning the use of automated high-level synthesis tools for obtaining high-performance FPGA implementations of industrial automation and control algorithms coded as PLC programs. The proposed method is mainly targeting demanding applications requiring lots of numerical computations.(More)
Attribute grammars have been used extensively in every phase of traditional compiler construction. Recently, it has been shown that they can also be effectively adopted to handle scheduling algorithms in high-level synthesis. Their main advantages are modularity and declarative notation in the development of design automation environments. In this paper,(More)
Recent advances in device densities and the requirement for short time-to-market has made FPGA devices very popular for the implementation of general purpose electronic devices. Modern FPGA architectures offer the advantage of partial reconfiguration, which allows an algorithm to be partially mapped into a small and fixed FPGA device that can be(More)
This paper presents a methodology for fast and efficient Design Space Exploration during High Level Synthesis. An augmented instance of the design space is studied taking under consideration the effects of both compiler- and architectural-level transformations onto the final datapath. A new gradient-based pruning technique has been developed, which(More)
Having to cope with the continuously increasing complexity of modern digital systems, hardware designers are considering more and more seriously language based methodologies for parts of their designs. Last year, the introduction of a new language for hardware descriptions, the SystemC C++ class library, initiated a closer relationship between software and(More)
PLCs have been the first choice for automation engineers for fast, reliable and robust implementation of their control algorithms for many years. Recently, with the introduction of advanced MEMS sensors and actuators and the penetration of new technologies in many diverse everyday tasks, with complicated control mechanisms and advanced calculations, it has(More)
This paper presents an automated framework for obtaining high-performance FPGA implementations of industrial automation and control algorithms coded as PLC programs. The proposed method is mainly targeting demanding applications, requiring lots of numerical computations. Based on previous experience, the proposed framework exploits Electronic System Level(More)
This paper considers the automatic synthesis of systolic architectures from nested loop algorithmic specifications. The high level input is given in the form of uniform dependence loops with unit dependencies and the target architecture is a multidimensional systolic array with unbounded number of cells. A complete methodology for the hardware synthesis of(More)