Gaurav Trivedi

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Many combinatorial optimization problems such as the min cost flow problem are equivalent to the solution of appropriate DC circuits made up of positive resistors, voltage sources, current sources and ideal diodes. Simulating the DC circuit is an alternative approach to the approximate solution of such problems. However, conventional simulators such as(More)
With growing Electronic Design Automation (EDA) industry, automated analog circuit design is now a feasible solution for the demand to exploit a span of nonlinear circuit behaviours from devices to circuits with the flexibility to optimize numerous competing continuous-valued performance specifications. In order to meet desired specifications, state-of-art(More)
This paper describes an application of machine translation technology for supporting collaboration in Wikipedia. Wikipedia hosts separate language Wikipedias for hundreds of different languages. While some content is specific to these different versions of Wikipedia, some topics have pages within multiple different Wikipedias. Similarly, while some users(More)
Physical problems offer scope for macro level parallelization of solution by their essential structure. For parallelization of electrical network simulation, the most natural structure based method is that of multiport decomposition. In this paper this method is used for the simulation of electrical networks consisting of resistances, voltage and current(More)
In this paper, a metaheuristic based on the hybrid of particle swarm optimization technique and simulated annealing scheme with Levy flight (l-HPSO) is proposed. The optimization technique incorporates Levy flight principle to improve convergence. Particle swarm optimization (PSO) is applied to construct initial solutions for simulated annealing (SA) scheme(More)
Due to complex architectures of modern high performance processor designs, signal integrity across the power grid network has become a challenging issue. To ensure reliable signal delivery, the process of power grid analysis requires definite investigation of entire power grid network for any hotspot (worst-case voltage fluctuation) using efficient(More)
In this paper, we explore an approximate logic synthesis approach to re-design adders for error-resilient applications. The objective is that the re-designed approximate adder reduces delay, power and area metrics, and thus, improves both functional and parametric yields due to decrease in the silicon area and delay, respectively. To ameliorate the Error(More)