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In this paper, 16-bit, 50 MHz current steering DAC is designed. This DAC is implemented using TSMC 0.35 /spl mu/m technology. An optimum segmentation is done of 16-bits into binary and thermometric bits. The integral nonlinearity (INL) and differential nonlinearity (DNL) is less than 0.3 LSB and 0.1 LSB respectively. It occupies only 0.06 mm area. The(More)
SRAM memory cell is considered to be more suitable for designing memory, particularly, cache memory. A reliable memory system that can tolerate multiple transient errors in the memory words as well as transient errors in the encoder and decoder (corrector) circuitry is to be introduced. Such novel development is the fault-secure detector (FSD), its(More)
—MOS transistor play a vital role in today VLSI technology. In CMOS based design, symmetry should be followed in circuit operation. Most of the complex circuits are allowed to design in CMOS, however, there are several drawbacks present in this complementary based design. CMOS has lost its credentiality during scaling beyond 32nm. Scaling down causes severe(More)
— The molecular vibrations of 1-Naphtol were investigated in polycrystalline sample, at room temperature, by FT-IR and FT-Raman spectroscopy. In parallel, ab initio and various density functional (DFT) methods were used to determine the geometrical, energetic and vibrational characteristics of 1-Naphtol. On the basis of B3LYP/6-31G* and B3LYP/6-311+G**(More)
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