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Detection and Parallel Execution of Independent Instructions
For a single instruction stream–single data stream organization the problem of simultaneously issuing several instructions is studied.
Representation of Concurrency with Ordering Matrices
TLDR
Several different types of ordering matrices, each type having the capability of exhibiting different amounts of potential concurrency, can be calculated from the d and ê vectors of the instructions of a task using ``linear algebraic-like'' operations. Expand
Mainframe Implementation With Off-The-Shelf LSI Modules
Bit-sliced microprocessor parallel design for Sperry Univac 1108 improves performance, reduces build cost, and detects most faults.
Special Feature Some Considerations in the Design of Mainframe Processors with Microprocessor Technology
TLDR
Implementing mainframes with multimicroprocessors entails an extra cost for main memory, which is analyzed here for several mainframe systems. Expand
Implications Of VLSI On Computer Design(Panel Discussion)
TLDR
It is the objective of this panel session to identify and discuss many of the technical issues related to designing computers with VLSI and this document will serve to highlight several of these issues. Expand