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Synthesis and Optimization of Digital Circuits
From the Publisher: Synthesis and Optimization of Digital Circuits offers a modern, up-to-date look at computer-aided design (CAD) of very large-scale integration (VLSI) circuits. In particular,Expand
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Networks on Chips: A New SoC Paradigm
TLDR
On-chip micronetworks, designed with a layered methodology, will meet the distinctive challenges of providing functionally correct, reliable operation of interacting system-on-chip components. Expand
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A survey of design techniques for system-level dynamic power management
TLDR
Dynamic power management (DPM) is a design methodology for dynamically reconfiguring systems to provide the requested services and performance levels with a minimum number of active components or a minimum load on such components. Expand
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Bandwidth-constrained mapping of cores onto NoC architectures
TLDR
We address the design of complex monolithic systems, where processing cores generate and consume a varying and large amount of data, thus bringing the communication links to the edge of congestion. Expand
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NoC synthesis flow for customized domain specific multiprocessor systems-on-chip
TLDR
We propose a complete synthesis flow, called Netchip, for customized NoC architectures, that partitions the development work into major steps (topology mapping, selection, and generation) and provides proper tools for their automatic execution (SUNMAP, xpipescompiler). Expand
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Analysis of error recovery schemes for networks on chips
TLDR
In this article, we discuss design constraints to characterize efficient error recovery mechanisms for the NoC design environment. Expand
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Networks on chips - technology and tools
TLDR
Network-on-Chip is the first to provide a unified overview of all the on-chip communication challenges, from physical wiring implementation up to software architecture. Expand
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SUNMAP: a tool for automatic topology selection and generation for NoCs
  • S. Murali, G. D. Micheli
  • Computer Science, Engineering
  • Proceedings. 41st Design Automation Conference, .
  • 7 June 2004
TLDR
We present SUNMAP a tool for automatically selecting he best topology for a given application and producing a mapping of cores onto that topology. Expand
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Error control schemes for on-chip communication links: the energy-reliability tradeoff
TLDR
On-chip interconnection networks for future systems on chip (SoC) will have to deal with the increasing sensitivity of global wires to noise. Expand
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Policy optimization for dynamic power management
TLDR
We introduce a finite-state, abstract system model for power-managed systems based on Markov decision processes. Expand
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