Frederic Voiron

We don’t have enough information about this author to calculate their statistics. If you think this is an error let us know.
Learn More
In this paper, we study the impact of electrical and thermal stress on line loss and characteristic impedance of a CoPlanar Waveguides (CPWs). The de-rating of the line propagation constants and impedance characteristic are analyzed and discussed with respect to the stress level applied to the dielectric. The physical mechanisms leading to dielectric(More)
This paper presents a new architecture of capacitive elements (MOSAIC), where the global capacitance is constructed out of a massive network of parallelized elementary cells. Electrical measurements in the RF domain are presented and show a very low ESR results combined with a high stability versus frequency up to hundreds of MHz. Being given that there is(More)
Capacitors linearity and reliability at high temperature are essential for embedded Point of Load regulation applications. RL parasitic are also becoming crucial for high frequency regulators. In that perspective, we present a silicon-integrated capacitor technology enhanced for high temperature linearity and reliability. A layout approach is proposed to(More)
This paper presents an original concept of a P+ guard ring realized in a 300μm depth High Resistivity Silicon Substrate (HRS) in order to reduce the substrate noise coupling in a 3D-PICS Integrated Passive Device technology. Guard rings have been designed to be a reliable and efficient protection against noise signals propagation. Case study(More)
This paper presents an original concept of a P+ guard ring realized in a 300¼m depth High Resistivity Silicon Substrate (HRS) in order to reduce the substrate noise coupling in a 3D-PICS Integrated Passive Device technology. Guard rings have been designed to be a reliable and efficient protection against noise signals propagation. Case study(More)
  • 1