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Reflection and automated introspection of a design in system level design frameworks are seen as necessities for the CAD tools to manipulate the designs within the tools. These features are also useful for debuggers, class and object browsers, design analyzers, composition validation, type checking, compatibility checking, etc. However, the central question(More)
This article describes the Balboa component integrationenvironment that is composed of three parts: a script languageinterpreter, compiled C++ components, and a set ofSplit-Level Interfaces to link the interpreted domain to thecompiled domain. The environment applies the notion ofsplit-level programming to relieve system engineers of softwareengineering(More)
Rising complexity and performances, shortening time-to-market demands, stress high-level embedded system design as a prominent research topic. Ad-hoc design methodologies, that lifts modeling to higher levels of abstraction, the concept of intellectual property, that promotes reuse of existing components, are essential steps to manage design complexity,(More)
Design visualization is an important part of the system design process. In practice, systems are often visualized using a combination of structural and functional entities. In this paper, we describe an approach that helps to capture the structural aspects of a design at a high level of abstraction and enables the system designer to enter designs(More)
—This paper presents the BALBOA component composition framework for system-level architectural design. It has three parts: a loosely-typed component integration language (CIL); a set of C++ intellectual property (IP) component libraries; and a set of split-level interfaces (SLIs) to link the two. A CIL component interface can be mapped to many different C++(More)
Starting with modules described in Signal synchronous programming language, we present an approach to verification of GALS systems. Since asynchronous parts of a GALS system can not be described in Signal, we use a mixture of synchronous descriptions in Signal and asynchronous descriptions in Promela. Promela is the input language to the SPIN asynchronous(More)
System-on-chip design introduced many new challenges for engineers. Among them, complexity management and reuse are important issues. Many efforts address complexity by raising the level of abstraction to increasingly functional levels. However, at any level of abstraction, structural information is as important as functionality for microelectronic design.(More)
The increasing heterogeneity and complexity of VLSI systems has made the use of C++ popular for building simulation and synthesis models at higher levels of abstraction. Currently, there are several different embodiments of C++ based environments, mostly in the form of hardware modeling libraries built on top of C++. However, the <i>semantic gap</i>between(More)
We consider the type inference problems in a compositional design environment where the components are automatically instantiated from pre-existing C++-based intellectual property (IP) libraries. We present a component integration language based on scripting for design specification. Our focus is architectural aspects in specification that uses aggregation-(More)
We present a behavioral semantics of SystemC that succinctly captures its reactive features, clock and time references, macro-and micro-time model, and allows the specification of a network of synchronous and asynchronous components communicating through either high-level transactions or low-level signal and event communications. The proposed semantic(More)