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Supported by the Intelligence Advanced Research Projects Activity (IARPA) via Department of Interior National Business Center contract number D11PC20165. The U.S. Government is authorized to reproduce and distribute reprints for Governmental purposes notwithstanding any copyright annotation thereon. Disclaimer: The views and conclusions contained herein are(More)
  • Fred Chong
  • 2014 IEEE International Symposium on Performance…
  • 2014
Summary form only given. In an era when massive data will enable unprecedented opportunities in business and science, computing faces significant challenges in the scaling of performance and energy consumption. The overarching problem is that of exponentially growing, massive global data, with 1,000X growth within the next 13 years. The World Economic Forum(More)
Rising chip densities have led to dramatic improvements in the cost-performance ratio of processors. At the same time, software costs are burgeoning. Large software systems are expensive to develop and are riddled with errors. Certain types of defects (e.g., those related to memory access, concurrency, and security) are particularly difficult to locate and(More)
We observe that when network traffic behaviors are represented in vector spaces as relative frequency histograms of behavioral features, they exhibit low-rank linear structure. We hypothesize that this structure is due to the distribution of flow behaviors following a finite mixture model. Aside from being of theoretical interest, this hypothesis has(More)
A prototype Haplotype Mapping strategy is presently being finalized by an NIH working group. The biological key to that strategy is the surprising fact that genomic DNA can be partitioned into long blocks where genetic recombination has been rare, leading to strikingly fewer distinct haplotypes in the population than previously expected. It would be(More)
As science and technology advance, researchers are faced with larger and more<lb>challenging problems. Often the number of calculations required to solve these problems<lb>places great demands on computing resources and can require greater computational<lb>power than currently exists. Thus, when new systems become available, it is important<lb>for(More)
Buffer chains used to drive large capacitive loads in CMOS circuits are important circuit elements and are frequently in the critical path in high performance systems. In this thesis, Post-Charge Logic, a recently developed dynamic circuit form is adapted to the buffering of static signals. Almost a factor of two improvement is gained in delay over existing(More)
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