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We develop a microprocessor design that tolerates hard faults, including fabrication defects and in-field faults, by leveraging existing microprocessor redundancy. To do this, we must: detect and correct errors, diagnose hard faults at the field deconfigurable unit (FDU) granularity, and deconfigure FDUs with hard faults. In our reliable microprocessor(More)
In this paper, we present a hardware technique, called Self-Repairing Array Structures (SRAS), for masking hard faults in microprocessor array structures, such as the reorder buffer and branch history table. SRAS masks errors that could otherwise lead to slow system recoveries. To detect row errors, every write to a row is mirrored to a dedicated " check(More)
The computer industry has turned to multicore processors as a power-efficient way to use the vast number of transistors on a chip. Most current multicore processors are homogeneous (i.e., all the cores are identical), and scheduling them is similar, but not identical, to what operating systems have been doing for years. However, microarchitects are(More)
To achieve high reliability despite hard faults that occur during operation and to achieve high yield despite defects introduced at fabrication, a microprocessor must be able to tolerate hard faults. In this paper, we present a framework for autonomic self-repair of the array structures in microprocessors (e.g., reorder buffer, instruction window, etc.).(More)
In this paper, we present a new metric, Hard-Fault Architectural Vulnerability Factor (H-AVF), to allow designers to more effectively compare alternate hard-fault tolerance schemes. In order to provide intuition on the use of H-AVF as a metric, we evaluate fault-tolerant level-1 data cache and register file implementations using error correcting codes and a(More)
EXECUTIVE SUMMARY The Northern Region of the USDA Forest Service completed a comprehensive survey and assessment of fish passage at road-stream crossings. The surveys were done over 3 years at a cost of $270 per site. Approximately 2900 culverts were surveyed on 50,000 miles of Forest Development Roads in Montana, northern Idaho and eastern North and South(More)
SNAP for ArcGIS is a computer software developed to streamline harvest area analysis for spatially-explicit timber harvest scheduling and transportation planning at a project level. This planning tool uses modern scheduling and network algorithms to develop harvest schedules up to three time periods with consideration of harvesting options and costs,(More)
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